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28-nm UTBB FD-SOI vs. 22-nm Tri-Gate FinFET Review: A Designer Guide—Part II
Department of Electrical and Electronics Engineering, Lebanese International University, Beirut, Lebanon
Department of Electrical and Electronics Engineering, Lebanese International University, Beirut, Lebanon
IMS Laboratory, University of Bordeaux, Talence Cedex, France
Department of Industrial Engineering, Lebanese International University, Beirut, Lebanon
- 1 Department of Electrical and Electronics Engineering, Lebanese International University, Beirut, Lebanon
- 2 Department of Electrical and Electronics Engineering, Lebanese International University, Beirut, Lebanon
- 3 IMS Laboratory, University of Bordeaux, Talence Cedex, France
- 4 Department of Industrial Engineering, Lebanese International University, Beirut, Lebanon
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Abstract
This is Part II of a two-part paper that explores the 28-nm UTBB FD-SOI CMOS and the 22-nm Tri-Gate FinFET technology as the better alternatives to bulk transistors especially when the transistor’s architecture is going fully depleted and its size is becoming much smaller, 28-nm and above. Reliability tests of those alternatives are first discussed. Then, a comparison is made between the two alternative transistors comparing their physical properties, electrical properties, and their preferences in different applications.
KeywordsUTBB FD-SOI: Ultra-Thin Body and Box Fully Depleted Silicon on InsulatorTri-Gate FinFETDIBL: Drain Induced Barrier Lowering
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