Testability Guidance Using a Process Modeling

Abstract

Software testability took a lot of interests of software community. Indeed, this concept has been interpreted in a variety of ways. One interpretation is concerned with the extent of the modifications a program component requires, so that the entire behavior of the component is observable and controllable. Another interpretation is the ease with which faults, if present in a program, can be revealed and estimated by the testing process and the propagation, infection and execution (PIE) model. It has been suggested that this particular interpretation of testability might be linked with two concepts: 1 ) the metric domain-to-range ratio (DRR), i.e. the ratio of the cardinality of the set of all inputs (the domain) to the cardinality of the set of all outputs (the range) and 2 ) the semantic fault size. First, this paper describes the connections between 1 ) the domain-to-range ratio and the observability and controllability aspects of testability and 2 ) the PIE model and fault size. The main goal of the work described here, is to seek greater understanding of testability in general and, ultimately, to find easier ways of determining it. Second, in this paper we try to model the PIE estimation using formalism for process representation system which is MAP formalism. We also use this process model to elaborate and to present the relationship between testability, PIE, DRR and fault size. Our aim is to enhance the guidance mechanisms of the process execution. After clarifying the existing relationship between semantic fault and testability, we improve the MAP model by adding qualitative criteria. We then offer a way to express maps to offer an automatic guidance of the map.