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Design of a Low-Noise Front-End Readout Circuit for CdZnTe Detectors

¹ School of Computer Science and Technology, Northwestern Polytechnical University, Xi’an, China
² School of Computer Science and Technology, Northwestern Polytechnical University, Xi’an, China
³ School of Computer Science and Technology, Northwestern Polytechnical University, Xi’an, China
⁴ School of Computer Science and Technology, Northwestern Polytechnical University, Xi’an, China
⁵ School of Computer Science and Technology, Northwestern Polytechnical University, Xi’an, China

Journal of Signal and Information Processing·Volume 04 (2013)·Pages 123–128·Published 8 May 2013·DOI10.4236/jsip.2013.42017

Abstract

In this paper, the design of a novel low-noise front-end readout circuit for Cadmium zinc telluride (CdZnTe) X-ray and γ -ray detectors is described. The front-end readout circuits includ e the charge sensitive amplifier (CSA) and the CR-RC shaper is implemented in TSMC 0.35 μm mixed-signal CMOS technology. The die size of the prototype chip is 4.9 mm × 2.2 mm . The simulation results show that, the noise performance is 46 electrons + 10 electrons/pF , and power consumption is 1.65 mW per channel.

KeywordsCdZnTeDetectorLow NoiseFront-EndReadoutCMOS

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Design of a Low-Noise Front-End Readout Circuit for CdZnTe Detectors

Abstract

References (9)