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New Model for Drain and Gate Current of Single-Electron Transistor at High Temperature
Laboratory of Microelectronics and Instrumentation, Faculty of Sciences of Monastir, University of Monastir, Monastir, Tunisia
Laboratory of Microelectronics and Instrumentation, Faculty of Sciences of Monastir, University of Monastir, Monastir, Tunisia
Laboratory of Microelectronics and Instrumentation, Faculty of Sciences of Monastir, University of Monastir, Monastir, Tunisia
Laboratory of Microelectronics and Instrumentation, Faculty of Sciences of Monastir, University of Monastir, Monastir, Tunisia
- 1 Laboratory of Microelectronics and Instrumentation, Faculty of Sciences of Monastir, University of Monastir, Monastir, Tunisia
- 2 Laboratory of Microelectronics and Instrumentation, Faculty of Sciences of Monastir, University of Monastir, Monastir, Tunisia
- 3 Laboratory of Microelectronics and Instrumentation, Faculty of Sciences of Monastir, University of Monastir, Monastir, Tunisia
- 4 Laboratory of Microelectronics and Instrumentation, Faculty of Sciences of Monastir, University of Monastir, Monastir, Tunisia
World Journal of Nano Science and Engineering·Volume 02 (2012)·Pages 171–175·Published 11 December 2012·DOI10.4236/wjnse.2012.24022
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Abstract
We propose a novel analytical model to describe the drain-source current as well as gate-source of single-electron transistors (SETs) at high temperature. Our model consists on summing the tunnel current and thermionic contribution. This model will be compared with another model.
KeywordsSingle-Electron Transistor (SET)Master EquationOrthodox TheoryTunnel CurrentThermionic CurrentSIMON
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